L&T EmSys Placement Paper Whole Testpaper Sivakasi-17 Jul 2008

Posted by FreshersWorld

7 Jan, 2012

L & T EMSYS PAPER ON 17th JULY 2008

HI guys I am Rajeev T studying Electronics & Communications in MSEC. I attended L&T EMSYS with the pre placement talk. Be active or at least pretend to be, answers first don?t hesitate to meet the crowd. Get prepared about the company profile not only for EMSYS for all other companies also.

There were two stages 1. Written test. 2. Direct interview (after some

months).

Written test consists of three sections 1. Technical(40 Q) 2. C apti (20 Q) 3. Filling up missing figure(35 Q)

Here are the few technical Questions asked in written test with answer underlined.

Technical 1. UJT starts conducting if its emitter is forwardbiased. 2. Schmitt trigger is otherwise called as----------. 3. Heart of Analog to Digital converter is comparator. 4. For differential amplifier CMRR value should be large. 5. The time constant for differentiator and integrator are small and large respectively. 6. Which gate act as parallel switch OR gate. 7. Which of the following is false (4 options will be given) 1+1 = 10. (X+Y)(X+Z)= X+YZ. 8. Which of the following is dual to A+1 (4 options will be given) A.0 = [reason: change + to . and 1 to 0].

A` . B` = (A+B) `. 9. The basic gate used for TTL logic NAND gate. 10. Which is not the specification for digital I.C Bandwidth. 11. Which is correct 1 0 1 =1. 12. Which logic is faster ECL. 13. Which is used for dynamic memory (FET, MOSFET, Transistor, and Flip Flop)? 14. What is half adder it add two binary input and give sum and carry. 15. What type of communication used in USART Half duplex. 16. What is the result of 1000>>2 0010 [right shift two times]. 17. For counters Flip Flop is used. 18. Number of flip flops used in counter is equal to number of bits in counter. 19. What is control bus in microprocessor output of microprocessor. 20. A 16 bit processor gets its name from Number of data bits. 21. A 12 bit address can access memory of 4 KB. 22. What is scratch pad temporary memory. 23. What does first machine cycle does opcode fetching. 24. What is the delay in shift register (n+1)T (not confirmed check it out). 25. If X(t) of m terms and Y(t) of n terms then the total number of terms in convolution of X(t) and Y(t) (i.e) h(t) have m+n. 26. What is FIR finite impulse response filter. 27. The function y(t)=x(t) + t. sin(t) is time variant. 28. The system y(n)=x(n)+x(n-1) is a casual system. 29. The fourier transform of impulse signal is 1. 30. Given that sin(3t) find fundamental frequency 3/2?.

[Reason: compare sin(3t) and sin(?t) ? ?=3 ? 2?f=3 ? f=3/2?]. 31. Which flip flop is used for binary storage D flip flop. 32. One question in monostable multivibrator??? 33. Another in op amp frequency response??? 34. One in RS flip flop truth table??? 35. ?. 36. ?. 37. ?.. 38. ?..

These are the questions that L & T EMSYS asking year by year.

So guys please atleast prepare questions related to this topic.

C APTI & 3 Rd SECTION

For this section please go through word document for c apti. Most of the people will have this. It is enough for this part if you want questions contact me at

Bye guys all the best. But I didn`t get through this L & T EMSYS .I got placed only after 14 succesive failure attempts in different unit of L&T,so don`t get relaxed, rather work with aggressiveness.

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L & T EMSYS PAPER ON 17th JULY 2008

There were two stages

1. Written test.2. Direct interview (after some

months).Written testconsists of three sections1. Technical(40 Q)

2. C apti (20 Q)

3. Filling up missing figure(35 Q)

Here are the few technical Questions asked in written test with answer underlined.

Technical1. UJT starts conducting if its emitter is forwardbiased.

2. Schmitt trigger is otherwise called as----------.

3. Heart of Analog to Digital converter is comparator.

4. For differential amplifier CMRR value should be large.

5. The time constant for differentiator and integrator are small and large respectively.

6. Which gate act as parallel switch OR gate.

7. Which of the following is false (4 options will be given) 1+1 = 10.

(X+Y)(X+Z)= X+YZ.

8. Which of the following is dual to A+1 (4 options will be given) A.0 = [reason: change + to . and 1 to 0].

A` . B` = (A+B) `. 0 1 =1.

9. The basic gate used for TTL logic NAND gate.

10. Which is not the specification for digital I.C Bandwidth.

11. Which is correct 1

12. Which logic is faster ECL.

13. Which is used for dynamic memory (FET, MOSFET, Transistor, and Flip Flop)?

14. What is half adder it add two binary input and give sum and carry.

15. What type of communication used in USART Half duplex.

16. What is the result of 1000>>2 0010 [right shift two times].

17. For counters Flip Flop is used.

18. Number of flip flops used in counter is equal to number of bits in counter.

19. What is control bus in microprocessor output of microprocessor.

20. A 16 bit processor gets its name from Number of data bits.

21. A 12 bit address can access memory of 4 KB.

22. What is scratch pad temporary memory.

23. What does first machine cycle does opcode fetching.

24. What is the delay in shift register (n+1)T (not confirmed check it out).

25. If X(t) of m terms and Y(t) of n terms then the total number of terms in convolution of X(t) and Y(t) (i.e) h(t) have m+n.

26. What is FIR finite impulse response filter.

27. The function y(t)=x(t) + t. sin(t) is time variant.

28. The system y(n)=x(n)+x(n-1) is a casual system.

29. The fourier transform of impulse signal is 1.

30. Given that sin(3t) find fundamental frequency 3/2?.

[Reason: compare sin(3t) and sin(?t) ? ?=3 ? 2?f=3 ? f=3/2?].

31. Which flip flop is used for binary storage D flip flop.

32. One question in monostable multivibrator???

33. Another in op amp frequency response???

34. One in RS flip flop truth table???

35. ?.

36. ?.

37. ?..

38. ?..

These are the questions that L & T EMSYS asking year by year.

So guys please atleast prepare questions related to this topic.

C APTI & 3 Rd SECTIONFor this section please go through word document for c apti. Most of the people will have this. It is enough for this part if you want questions contact me at

Bye guys all the best. But I didn`t get through this L & T EMSYS .I got placed only after 14 succesive failure attempts in different unit of L&T,so don`t get relaxed, rather work with aggressiveness.